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Generative AI On A General-Purpose Neural Processor (GPNPU)

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Generative AI On A General-Purpose Neural Processor (GPNPU)

Generative-AI workloads evolve on a quarterly cadence, with novel attention variants, quantization formats, and routing schemes appearing faster than fixed-function neural-processor silicon can be respun. This paper presents the General-Purpose Neural Processor (GPNPU): a single programmable processor architecture, delivered as configurable IP, that unifies scalar, vector, and matrix execution in one instruction-set architecture (ISA) and one programming model accessible from standard C++ and Python.

Fig.1: Chimera GPNPU core block diagram. A single instruction stream feeds the scalar unit and the 2D SIMD PE array; per-PE detail (right) shows the 32-bit ALU, configurable MAC bank, local register-file SRAM (LRM), and neighbor-communication path. All on-chip memory (LRM and L2) is software-managed. Source: Quadric



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