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Fourier transforms are mathematical calculations that can be used to identify the frequencies that make up a signal and shed light on their individual contributions. These transforms have been used, for example, to unveil patterns in sounds and images, ranging from gradual changes in intensity to fine repeating motifs or details.

Digital processors, computing devices that process data as discrete binary numbers represented by 0s and 1s, generally perform these calculations using the fast Fourier transform (FFT) algorithm. The FFT recursively breaks down a large Fourier transform into smaller transforms, and this divide-and-conquer approach leads to a massive speedup on digital processors. This benefit is expressed in its famous O(N log N) scaling law, which dictates how the time and energy needed to compute the Fourier transform scale with the size of the transform (N).

Analog computers, which process data in the form of electrical voltage or other continuous physical quantities, have not traditionally been used to run large Fourier transforms. Adapting the FFT algorithm to an analog computer would leverage the inherent energy efficiency of this mode of computing, while still taking advantage of the algorithm's computational complexity advantage, which has so far been available only to digital processors.

Researchers at Sandia National Laboratories, Infineon Technologies and Arizona State University recently demonstrated a new approach for efficiently performing crucial FFT calculations with an analog system made up of a large array of memory components.

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