Google's eighth-generation TPU family has now expanded further. Back in April, the company announced TPU 8t for training AI models and TPU 8i for general-purpose inference workloads. Google has now introduced TPU 8tx, built on the same silicon as the previously announced 8t, for confidential, hardware-isolated inference aimed at regulated enterprises and governments, and TPU 8i Max, which combines two 8i chips on one package for long-context agentic work.

TPU 8tx swaps the Arm-based Axion hosts of the 8t and 8i for a 5th Gen AMD EPYC CPU, adopting a Boardfly network, and the 8i Max doubles the compute, SRAM, and HBM bandwidth of the original 8i. The original split, the TPU 8t and 8i, made natural sense. The 8t targets large-scale training, while the 8i leans toward low-latency inference and reasoning. TPUs have become a fast-growing business, with the company claiming nearly 100 customers, including Meta’s recent move to TPUs. The more modular approach is flexible and can deliver specialized systems “in a matter of months rather than years,” helping that popularity along.

For the new parts, the TPU 8i Max isn't innovative on the surface, as it’s just two TPU 8i chips combined into a single package. The result is twice the theoretical compute, but more importantly, it fits twice the silicon within the “existing rack footprint,” and Google claims more compute per square foot and per watt.

2 TB/s HBM bandwidth. This compares to Nvidia’s Rubin R200 GPU at a rated 50 FP4 PFLOPS for inference and 22 TB/s of HBM4 per socket, or AMD’s MI455X with 40 FP4 PFLOPS.

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