AI agents are becoming smarter, more capable, and increasingly optimized for specific tasks, creating new opportunities to use smaller language models instead of relying on large language models for every task.

This shift has broad implications for the semiconductor industry, from the actual design and manufacturing of chips, to how those chips function under different workloads. While LLMs can deploy swarms of agents for continuous reasoning and independent action, that’s overkill for most applications.

But reducing the size of the model, and potentially the number or capability of the agents, adds its own challenges. One approach is to divide complex workflows among smaller language models and agents, while still retaining the compute capability needed to design, optimize, floor-plan, verify, and debug chips, and to identify anomalies and variation in manufacturing processes that might limit yield. This approach combines both human expertise with AI’s ability to crunch massive amounts of data.

“In our early work on agents, which we created for each of our tools, we have questions and answers,” said Prith Banerjee, senior vice president of innovation at Synopsys . “We had an agent for this, and an agent for that. But in this world of multi-agent workflows, our customers are trying to design a chip. Maybe they’re having a problem with the PPA, and some engineers say they know exactly what changes are needed to lower the power. So they’ll do clock gating, but when you do clock gating it increases the area. Then, someone who is the area expert will come in.

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