Moving advanced packaging from wafer to panel sounds, at first, like a geometry problem. Large AI and HPC packages are increasingly rectangular, while the 300mm wafer underneath them is still round. As the package size grows, more of that expensive processing ends up around the circle’s edges where nothing useful can be built.

A panel gives that area back. It can fit more large packages into the same process cycle, and unlike a wafer, its dimensions don’t impose the same hard limit on the size of a square or rectangular package. For advanced packages that keep getting larger, the economics are difficult to ignore.

But the semiconductor packaging sector has spent decades learning how to process wafers, not panels. Equipment, materials, recipes, handling systems, and process controls were all developed around the geometry and mechanical behavior of a round workpiece.

“The risk of doing the assembly on the 600mm panel is high, and I don’t think we have all the equipment today to run the process,” said Teck Chong Lee, technical director of advanced fan-out development for HPC applications at ASE, in a recent presentation. “One of the options is, once you complete the interposer in large format in 600, then you divide it into four pieces to run the assembly and the C4 process. This is a much lower-risk approach.”

The economics behind that compromise are substantial. 5×-reticle-size interposer produced 9 units on a 300mm wafer, compared with 16 on a 300mm panel. A 600mm panel divided into four 300mm pieces produces 64, while processing the full 600mm area intact raises that to 72.

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