Experts at the Table: Semiconductor Engineering sat down to discuss the good and bad of shifting left amid ongoing changes in how chips are designed, used, and updated throughout the flow, with Frank Schirrmeister, executive director of strategy programs and system solutions at Synopsys; Ronen Laviv, vice president of business development and strategic partnerships at Hiveware; Jack Berg, vice president of business development at Silvaco; Ashish Darbari, founder and CEO of Axiomise. What follows are excerpts of that conversation.

SE: We’ve been talking about shifting left in the design-through-manufacturing flow for more than a decade, but more and more capabilities are being added to improve reliability and  yield, and produce silicon faster. What changes are you seeing?

Schirrmeister: We’re now adding digital twins, which are shifting very left.

Berg: That’s correct. And the issue now is working with multi-physics models. Using that data to assemble surrogate models is important. As we go further into different technologies with different materials, you have to go back to the materials science solvers and physics solvers to get models that designers can use. This is happening in areas that are not typically digital design, but as we get down to the CFET level, it’s starting to be used there, as well.

Schirrmeister : There are three changes. Number one, now we have the technical ability with compute, with agents, to shift much further left than we ever hoped we would get to in our lifetimes. The problem there is whether shift left is trustworthy.

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