Advanced chips now come with an extraordinary amount of evidence about them. They’re modeled before they exist, measured during fabrication, inspected during assembly, electrically tested at the wafer and package levels, characterized under thermal and power loads, and increasingly monitored from inside the silicon after deployment. In some ways, engineers can see more of a device than ever before.

The problem is that each of those views is partial. A measurement can be accurate in every respect and still be pointed at the wrong part of the system.

“For X-ray and test technologies, we focus on the interconnect between the chips, and chips and the outside world,” said Yipeng Zhou, product line manager for Test Products at Nordson Test & Inspection. “Voids, cracks in the solder, and head-in-pillow are a few predominant defect types that pass electrical test due to the presence of physical contact. But these defects usually lead to premature failure. It’s like putting a screw in without tightening it.”

This gets at the broader visibility issue. The electrical test isn’t necessarily wrong. There’s a conductive path, and under the conditions of that test, the device may work exactly as expected. The harder question is whether the physical structure carrying that current is sound enough to keep doing so over the long term, and that’s where the visibility gap increasingly lives.

Every tool has a blind spot As interconnects shrink, it becomes harder to catch defects before they escape. A defect that once occupied enough area to stand out might now be buried among dense stacks of bumps, wires, vias, and surrounding materials.

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