AMD published October 11, 2026 a blog post explaining how its programmable AI NIC architecture supports Ultra Ethernet Consortium, Multipath Reliable Connection, and MetaRoCE transports for AI workloads.

AMD published a blog post on October 11, 2026 explaining how its AI NIC technology supports multiple Ethernet transport protocols developed for large-scale artificial intelligence workloads. The post, attributed to AMD Networking, describes the company's programmable network interface card architecture as enabling organizations to adopt different congestion control and load balancing approaches without replacing hardware.

According to the AMD blog, the company cited a Gartner forecast projecting that more than 80% of hyperscalers will choose Ethernet for AI workloads by 2028. AMD stated that large-scale AI training requires fast recovery from congestion and path failures, packet spray load balancing, and source routing capabilities that traditional Ethernet transports such as RoCEv2 were not originally designed to provide.

AMD reported that three new AI-ready Ethernet transports emerged in a 16-month period, highlighting what the company described as the pace of AI networking innovation. The blog post detailed AMD's involvement with each transport specification.

In 2025, the Ultra Ethernet Consortium—comprising more than 100 industry members according to AMD—developed an open Ethernet architecture for AI and high-performance computing environments. AMD stated it was a founding member and authored Network-Signaled Congestion Control, now included in the consortium's congestion management specification. The company said it delivered one of the first AI NICs capable of supporting the UEC transport specification.

In 2026, Multipath Reliable Connection was initially developed by OpenAI with contributions from AMD, Microsoft, and other participants before being contributed to the Open Compute Project, according to AMD's account.

Source link