AMD and Qblox are advancing fault-tolerant quantum computing by developing a low-latency quantum-classical feedback loop for error correction.

AMD and Qblox have announced a collaboration to address one of the critical challenges in fault-tolerant quantum computing: the development of a real-time quantum-classical feedback loop for error correction. This partnership combines Qblox's control stack technology with AMD's high-performance computing hardware to enable efficient quantum error correction (QEC) within the coherence window of qubits.

Fault-tolerant quantum computing requires a seamless feedback loop where measurement data from qubits is processed by classical computing systems, decoded, and returned as corrections in real time. Qblox contributes its modular Cluster system, which includes synchronized control and readout modules connected via the LINQ feedback network and synchronized by SYNQ. AMD complements this with its Adaptive SoCs, FPGAs, Instinct™ GPUs, and EPYC™ server CPUs, forming the classical compute backbone.

The feedback loop crosses two critical boundaries. The first is within the control stack, where FPGA-based modules coordinate circuit executions and read out qubits. The second is between the control stack and the classical compute fabric, where quantum error correction algorithms are executed. This collaboration focuses on optimizing the second boundary by creating a direct, low-latency interconnect between the control system and accelerator memory.

The interconnect developed by AMD and Qblox uses an Aurora link to transfer data between the control system and an AMD Alveo™ U55C link card. 3125 Gb/s each, using AMD's lightweight point-to-point serial protocol. The Aurora plug-in delivers frames as 512-bit words at 250 MHz, which are then written directly into accelerator memory via PCIe peer-to-peer writes.

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