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Gelsinger-backed Nagare Labs’ Z2RAM promises SRAM speed at DRAM density

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Gelsinger-backed Nagare Labs’ Z2RAM promises SRAM speed at DRAM density

A Pat Gelsinger-backed Georgia Tech spinout, Nagare Labs, says its Z2RAM can put SRAM-speed memory, at DRAM density, directly on top of AI chips. The founders’ own papers show a fast-improving cell that, tested up to 85 degrees Celsius, holds data for over 300 seconds. Gen 1 is projected to have 5x SRAM density with six stacked layers, 14x DRAM speed, and 3x less read energy than SRAM.

AI chips require a lot of bandwidth, and it has been challenging to get sufficient yields of high-bandwidth memory (HBM) to feed them. Even when manufacturers can get it, some reportedly plan to settle for fewer layers for yield reasons, and heat is another. Heat is also why Samsung’s zHBM, which stacks DRAM directly on the processor, is planned at only about four layers.

Alternatives include high-bandwidth flash, still in development, which stacks NAND like HBM and would sit beside the GPU, or SRAM stacked directly on the die, which is less dense and more expensive for the capacity, but also faster. DRAM, which is more capacious, can sit on top of the compute, but heat limits how hard the logic underneath can run.

That limit is already shaping chipmakers’ design path for stacked memory. Micron’s vHBM plans, for example, include heat-spreading structures. With HBM stacked on a logic die, and DRAM needing to be kept at or below 95 degrees Celsius, the logic’s heat output is capped at 220 W/cm², or 300 W/cm² with better thermal vias, according to a 2025 simulation by co-founder Shimeng Yu’s group.


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