IP integration is not the most glamorous task in semiconductor design, but it often is one of the most troublesome. At the intersection of block-level verification and system-level interactions, bugs are often very difficult to find.

The creation of the Virtual Socket Interface Alliance (VSIA) in 1996 was, for many, the first time the notion of designing a system by integrating third-party IP blocks became a reality. Its charter was to unify and standardize the way IP was constructed, verified, delivered, and supported. The alliance dissolved in 2008, considering its work to either be complete, or transferring parts of it to other organizations that were more focused on specific pieces of the problem. Eighteen years later, the problem continues to evolve.

The idea was that each company should focus on developing the part of the design that was novel and unique, adding their expertise, and allowing the rest to be developed by domain experts.

“Ten years ago, a design may have had tens of IP blocks,” says Pedro Pires, SOS product manager at Keysight EDA. “Today, a company may have thousands of IPs, dozens of different versions of the same IP, and you want to make sense of all of this. In addition, they are much more configurable than they were in the past. With the increasing quantity and different types of data now required for each block, it is becoming very difficult to manage in an ad hoc way. “

This puts a lot of stress on verification.

Source link